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Figure 8.7. Detailed memory map for the 8 channels, including the alternate data structure
Unused
0x0FC
Alternate for
channel 7
Control
Destination End Pointer
Source End Pointer
0x0F8
0x0F4
0x0F0
Alternate
Unused
0x09C
data
structure
Alternate for
channel 1
Alternate for
channel 0
Prim ary for
channel 7
Control
Destination End Pointer
Source End Pointer
Unused
Control
Destination End Pointer
Source End Pointer
Unused
Control
Destination End Pointer
Source End Pointer
0x098
0x094
0x090
0x08C
0x088
0x084
0x080
0x07C
0x078
0x074
0x070
Prim ary
Unused
0x01C
data
structure
Prim ary for
channel 1
Prim ary for
channel 0
Control
Destination End Pointer
Source End Pointer
Unused
Control
Destination End Pointer
Source End Pointer
0x018
0x014
0x010
0x00C
0x008
0x004
0x000
The controller uses the system memory to enable it to access two pointers and the control information
that it requires for each channel. The following subsections will describe these 32-bit memory locations
and how the controller calculates the DMA transfer address.
8.4.3.1 Source data end pointer
The src_data_end_ptr memory location contains a pointer to the end address of the source data.
Figure 8.7 (p. 52) lists the bit assignments for this memory location.
Table 8.7. src_data_end_ptr bit assignments
Bit
[31:0]
Name
src_data_end_ptr
Description
Pointer to the end address of the source data
address of the source data. The controller reads this memory location when it starts a 2 DMA transfer.
Before the controller can perform a DMA transfer, you must program this memory location with the end
R
Note
The controller does not write to this memory location.
2011-04-12 - d0001_Rev1.10
52
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